High Performance
- Already support 6/7/12/16nm - Data rate up to 32Gbps per lane - Support 4/8/16/32 configurable data lanes - Typical efficiency less than 1.0pJ/b - Ultra low D2D latency, especially for xPU application - Support max D2D connection distance 30mm
High Reliability - Silicon Proven, can provide evaluation kit and silicon report - BER<10-15 without ECC - Built-in self-test (BIST) & data retransmission mechanism - Pass 1000h aging tests - Pass various environment & reliability tests - Already mass production in several projects
High Flexibility - Support AXI/ACE/CHI/CXS.B multiple system bus - Support 2D/2.5D multiple packaging stack-up - Proven silicon, evaluation platform, integration tools - Support customized D2D connect feature |